Technology Services

Deposition plays a central role in the fields of semiconductors, post-CMOS and micro- and nanoelectromechanical systems (MEMS and NEMS). Various deposition techniques are used to apply thin layers of different materials to substrates in order to achieve certain electrical, optical and chemical properties.

These processes are crucial for the development of modern electronics, from microprocessors to sensors. The layers can be made of different materials, including silicon, metals and insulators.

Chemical vapor deposition (CVD):

In this process, thin layers are deposited on a substrate by chemical reactions. One example is the deposition of silicon dioxide for insulation in integrated circuits. Another is the production of a conductive multilayer metallization by CVD with tungsten. 

Low-pressure CVD (LPCVD):

This variant of CVD is carried out under reduced pressure, which is ideal for conformal layers, e.g. SiN layers in our highly flexible platform for post-CMOS photonics.

Atomic Layer Deposition (ALD):

ALD enables the precise deposition of atomically thin layers. 

Thermal oxidation:

In this process, an oxide layer is created on a silicon substrate by exposing it to oxygen at high temperatures to form silicon dioxide. We can offer oxide thicknesses from a few to several hundred nanometers, ideal for electrical insulation.

Physical vapor deposition (PVD):

In this process (sputtering), the material is converted from the solid to the gas phase and then deposited onto the substrate. Various (semi-)conductive layers are available at Fraunhofer IMS. 

Optical lithography is an important process in semiconductor manufacturing that enables the creation of extremely fine structures on semiconductor materials. These structures are essential for processing all types of devices.

The main steps in optical lithography:

• Layout conversion: We support our partners in converting their ideas into photomasks. The integration of test structures and alignment marks for our steppers and test structures ensure the quality and accuracy of the patterns on the wafers.
• Accuracy: Our optical lithography achieves a accuracy of up to 0.35 µm, ensuring very fine details on the wafer.
  
• Backside alignment: This technique allows the wafer to be aligned from the back, providing additional flexibility when manufacturing complex structures on both wafer sides.
• Stitching: This technique allows for more complex designs that would be more difficult to realize using conventional methods. This is achieved by combining image fields in a targeted manner to create larger sensor surfaces.
  

We have extensive expertise in various etching technologies for realizing your 3D structures. One example of the use of these technologies is the etched via contact between a combined CMOS and MEMS wafer.

Another example is our patented etching of sacrificial layers to produce freestanding MEMS structures.

Our etching technology includes:

• Plasma enhanced etching: Use of plasma to enhance etch capabilities and provide finer feature resolution.
• Ion milling/etching: Enables high resolution patterning by ion milling.
• Deep reactive ion etch (DRIE): Perfect for creating deep and intricate structures. (link if applicable)
  
• Isotropic release etching (XeF₂, HF): Efficient release of structures with isotropic etching techniques.
• Wet chemical etching: For precise and controlled material removal.
  

Fraunhofer IMS offers advanced measurement techniques tailored to microelectronics and semiconductor manufacturing. Our capabilities ensure high precision and reliability in the development of semiconductor devices through various techniques:

Key competences in metrology

• Optical metrology: use of interferometry, ellipsometry, and microscopy for precise measurements of surface topography and critical dimensions (CD).
• X-ray Diffraction: XRD for measuring e.g. crystallinity or layer composition of individual materials
• Electrical metrology: measurement of key electrical properties such as resistance, capacitance and inductance to evaluate devices and materials for reliable performance.
  
• Interface analysis: Use of scanning electron microscopy (SEM), atomic force microscopy (AFM) for surface evaluation, and scanning acoustic microscopy (SAM) for in-depth profiling of interfaces and to verify voids. This includes detection of voids at the interface of bonded wafers to ensure package integrity.