APECS - Advanced Packaging and Heterogeneous Integration for Electronic Components and Systems

As part of the EU Chips Act, the APECS pilot line represents a major step forward in strengthening European semiconductor manufacturing capabilities and chiplet innovation. By providing large industrial companies, SMEs and start-ups with easier access to cutting-edge technology, the APECS pilot line will lay a solid foundation for resilient and robust European semiconductor supply chains.

Within the framework of APECS, the institutes affiliated with the Research Factory Microelectronics Germany (FMD) are working closely with other European partners, thus making an important contribution to the European Union's goals of increasing technological resilience, strengthening cross-border cooperation and improving global competitiveness in the field of semiconductor technologies.

APECS is the novel pan-European pilot line to establish a groundbreaking infrastructure for  heterogeneous integration:

• By combining the know-how of our partners we will offer services, capabilities and training for European companies and research organizations to integrate and package chiplets and further advanced electronic components into novel electronic systems.
• By joining forces of Europes´ leading RTOs, the platform of capabilities to be developed will include novel characterization, quality assurance, testing & reliability methodologies and a System-Technology Co-Optimization (STCO) design framework to ensure quality, reliability, security, green manufacturing and fast production ramp-up in collaboration with manufacturing organizations.

The APECS pilot line is coordinated by the Fraunhofer-Gesellschaft and implemented by the Research Fab Microelectronics Germany (FMD). As a cooperation between the Fraunhofer Group for Microelectronics and the Leibniz Institutes FBH and IHP, the FMD is the central point of contact on all matters concerning applied research and development in the field of micro and nanoelectronics in Germany and Europe.

APECS OBJECTIVES

• Linking application-oriented research and innovative development in the field of heterogeneous integration, in particular through the use of new chiplet technologies.
• Delivering robust and reliable heterogeneous systems to increase the innovation capacity of the European semiconductor industry
• Supporting European microelectronics by standardising integration technologies and developing new functionalities within the framework of the STCO (System-Technology Co-Optimisation) approach
• Supporting European companies in developing advanced products with high yields, even in medium quantities, at competitive costs
• Providing a single point of contact for companies, including SMEs and technology start-ups, to simplify processes and ensure efficient collaboration at every stage
• Contributing to a carbon-neutral and circular economy by focusing on environmentally friendly production

Our contribution to the APECS pilot line includes the complete development and manufacture of highly integrated chiplets. These consist of photonic integrated circuits (PICs) implemented on CMOS readout circuits. We manufacture these chiplets on 200 mm wafers in our clean room under industry-standard conditions.

Equally important, we develop the associated design infrastructure. This includes customised design flows, process design kits (PDKs), assembly design kits (ADKs) and simulation models. This enables us to offer our customers low-threshold access to complex technologies. Our portfolio is rounded off by comprehensive characterisation and testing services.

To demonstrate the capabilities of the APECS pilot line, we are working with our partners to develop a multi-material sensor demonstrator. Our chiplets are integrated on a common interposer together with the technologies of other pilot line partners. This demonstrator impressively illustrates how heterogeneous integration of different material systems and technologies interact in a functional system – which is precisely the core idea behind APECS!